Proactive Thermal-Aware Multicore Scheduling Using Job Migration and Power-Gating

Overheating multi-core chips is known to accelerate their failure. To improve the reliability of advanced embedded real-time systems built with multi-core chips, dynamic thermal management (DTM) has been developed and applied to mission/safety-critical applications running on a multi-core chip to avoid possible thermal hazards, and hence to avoid/reduce chip failure. Traditional DTM based on dynamic voltage and frequency scaling (DVFS) has limited applicability to modern multi-core chips due to increasing leakage power. Moreover, DTM must be applied in such a way that the underlying applications meet their timing constraints. In this paper, we explore a new class of DTM, namely, jobmigration and power-gating, and propose an efficient runtime thermal-aware scheduler (TAS) to avoid thermal hazards without violating critical applications’ timing constraints. Based on proactive thermal management using Support Vector Machines (SVMs), the TAS periodically estimates future core temperature and triggers a pre-defined thermal management scheme that migrates the jobs running on the estimated-to-be-overheated cores to other cooler cores. The overheated cores can then be turned off for a certain period of time to cool down, when necessary. With the schedulability condition checked by the TAS, all tasks’ timing constraints are guaranteed to be met even when jobs are migrated from overheated cores and some cores are powered off and on. Our in-depth evaluation based on the HotSpot thermal simulator has shown that the proposed algorithm effectively maintains the core temperature below a given threshold without violating any timing constraint.